X-Scale - definitie. Wat is X-Scale
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Wat (wie) is X-Scale - definitie

MICROPROCESSOR CORE
82430MX; Mobile Triton; Xscale; X-scale; Intel Xscale; X-Scale; Intel XScale; PXA27x; Manitoba (computer chip); IXP425; XScale Processor; Marvell XScale; PXA250; PXA255
  • Intel PXA270 with 624 MHz
  • System On Module]] by tianyeit.com
  • Intel PXA255

XScale         
XScale is a microarchitecture for central processing units initially designed by Intel implementing the ARM architecture (version 5) instruction set. XScale comprises several distinct families: IXP, IXC, IOP, PXA and CE (see more below), with some later models designed as SoCs.
Mobile Triton         
<processor> (Official name 82430MX) A version of Intel's Triton I processor chip set intended for mobile computers. Mobile Triton consists of one 82437MX and two 82438MX. [Special features?] (1996-04-03)
82430MX         

Wikipedia

XScale

XScale is a microarchitecture for central processing units initially designed by Intel implementing the ARM architecture (version 5) instruction set. XScale comprises several distinct families: IXP, IXC, IOP, PXA and CE (see more below), with some later models designed as system-on-a-chip (SoC). Intel sold the PXA family to Marvell Technology Group in June 2006. Marvell then extended the brand to include processors with other microarchitectures, like ARM's Cortex.

The XScale architecture is based on the ARMv5TE ISA without the floating-point instructions. XScale uses a seven-stage integer and an eight-stage memory super-pipelined microarchitecture. It is the successor to the Intel StrongARM line of microprocessors and microcontrollers, which Intel acquired from DEC's Digital Semiconductor division as part of a settlement of a lawsuit between the two companies. Intel used the StrongARM to replace its ailing line of outdated RISC processors, the i860 and i960.

All the generations of XScale are 32-bit ARMv5TE processors manufactured with a 0.18 μm or 0.13 μm (as in IXP43x parts) process and have a 32 KB data cache and a 32 KB instruction cache. First- and second-generation XScale multi-core processors also have a 2 KB mini data cache (claimed it "avoids 'thrashing' of the D-Cache for frequently changing data streams"). Products based on the third-generation XScale have up to 512 KB unified L2 cache.